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Front-end circuit design of ultrasonic sensor based on FPGA


A FPGA-based ultrasonic sensor front-end processing circuit is designed in this paper, including transmitting and receiving circuits and signal conditioning circuits. Through the FPGA control, an electric pulse signal with an ultrasonic frequency is loaded on both ends of the piezoelectric ceramic sheet, so that the piezoelectric ceramic sheet generates a mechanical oscillation with the same frequency, thereby forming an ultrasonic wave in the air. On the contrary, after receiving the ultrasonic wave in the air, the piezoelectric ceramic plate will convert the ultrasonic wave signal into an alternating voltage signal. After subsequent circuit processing, it will be input into the FPGA for analysis, and finally the information of wind speed and direction will be obtained.

Transmitting and receiving circuit of ultrasonic sensor

Figure 1 shows the transmitting and receiving circuit of an ultrasonic sensor. The excitation signal of the ultrasonic sensor is generated by FPGA. In order to prevent the back-end transmitting circuit voltage (+ 12V) from burning out the pins, an isolation circuit is added. In addition, considering the driving of the field effect transistor, a MOSFET integrated driving chip is used. The TPS2811D chip from TI is used to both isolate and drive the MOSFET, and the output signal always has a fast conversion speed.

2. Ultrasonic sensor signal conditioning circuit

2.1 Receiving anti-interference limiting circuit

The amplitude of the noise signal received by the ultrasonic sensor is more than 1V, which is much larger than the amplitude of the useful alternating voltage signal. Therefore, the signal should be limited before it enters the post-circuit, as shown in Figure 2. An antiparallel silicon-type diode is connected between the signal line and the ground. Its forward voltage is 0.7V, and the amplitude of the useful alternating signal we need is much less than 0.7V, so it can filter some noise signals. Off.

2.2 Preamp circuit

The useful signal received by the ultrasonic sensor is very weak, so the alternating electric signal output by the ultrasonic sensor needs to be amplified.

Figure 3 is a schematic diagram of an op amp circuit designed using the MAX412 chip.

2.3 Band-pass filter circuit

The frequency of the ultrasonic signal received by the system is 200kHz, so unwanted signals at frequencies other than 200kHz should be filtered. This design selects Maxim's active filter MAX275, which uses a second-order filter cascade inside MAX275 to implement a fourth-order band-pass filter to filter the ultrasonic sensor's received signal, as shown in Figure 4.

2.4 AGC automatic gain control amplifier circuit

In order to ensure that the amplitude of the received ultrasonic alternating voltage signal maintains a relatively stable and reasonable range, an automatic gain control amplifier circuit is used. The AD603 chip from ANALOG Company in the United States is selected, and its gain is set to -10 ~ 30dB and the bandwidth is 90MHz, which meets the amplification requirements of the ultrasonic alternating voltage signal after the previous stage amplification and filtering. Before using the AD603 chip, it is necessary to perform noise reduction processing on the signal. And can play an isolation role, the circuit diagram is shown in Figure 5.

Figure 6 shows the schematic of the AD603 automatic gain control amplifier circuit.

2.5 Voltage comparison circuit

After the aforementioned related processing, the ultrasonic electric signal is still an alternating voltage analog signal, and cannot be directly sent to the FPGA for processing. In this design, there is no need to convert the entire alternating voltage signal into a corresponding digital signal for processing in the FPGA, so the analog signal can be replaced with a digital signal by means of voltage comparison. Maxim's MAX912 comparator chip is selected. The comparator has two sets of comparators that are independent of each other and can be latched and controlled. In addition, the devices can accept differential input signals and have complementary TTL compatible outputs. . Due to the influence of noise, the ideal threshold voltage cannot be selected as 0V. After several experiments, 0.2V is selected as the threshold voltage. The voltage comparator circuit is shown in Figure 7. The voltage at the output is small and can be directly connected to the FPGA.

Circuit simulation

The ultrasonic alternating voltage signal without any processing contains a lot of noise and cannot be used directly, as shown in FIG. 8.

The ultrasonic alternating voltage signal is shown in FIG. 9 after receiving the anti-interference limiting circuit, the preamplifier circuit, the band-pass filter circuit, the AGC automatic gain control amplifier circuit, and the voltage comparison circuit. It can be seen that after the signal conditioning circuit, the received signal has become a digital signal that can be used directly by the FPGA.

Article excerpt: Li Zhigang, Qi Xianwei, Zhang Yancheng. FPGA-based front-end circuit design of ultrasonic sensors [J]. Electronic Design Engineering, 2013, 21 (21): 133-136.

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